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Thomas Chau

Thomas Chau

     

 

Highlights

I am currently a TPU architect at Google, where I define the next-generation machine learning accelerator architecture and ISA for on-device machine learning applications. Previously, I was an NPU architect at the startup Neubla, leading the architectural and ISA development. Before that, I served as a senior research scientist at Samsung AI Centre in Cambridge, focusing on the co-design of hardware and deep neural networks. My earlier experience includes roles at Altera/Intel and in the Research and Development Department of ARM.

I obtained my PhD in Computing at Imperial College London in 2014, under the supervision of Professor Wayne Luk. Before that, I received my BEng and MPhil degrees in Computer Science and Engineering from the Chinese University of Hong Kong, in 2008 and 2010, respectively. My research was about FPGA acceleration of sequential Monte Carlo method (particle filter) and Proximity Query process. See my publications, DBLP list and Google Scholar Citations for details.

 

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About my Chinese name


*In Chinese naming order, the family name comes first, followed by the given name.