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Reconfigurable devices for real-time applications

Real-time systems must respond to events within explicit deadlines or the system may risk severe consequences. We exploit the opportunities to enhance development of real-time systems using reconfigurable technologies. Our target platforms include multi-processors systems, and HPCs with general purpose processors and FPGAs. We apply dynamic resource allocation and run-time reconfiguration for improved performance and energy efficiency. The design methodologies have been applied to various applications, particularly those employing particle filter / Sequential Monte Carlo method (SMC) and Proximity Query process (PQ). Example applications include air traffic management, mobile robot localisation, human-robot collaborative control for surgery, and financial modelling.

Particle Filter / Sequential Monte Carlo method (SMC): Click here for details.

Proximity Query process (PQ): Click here for details.

Structured ASIC development

Structured ASIC is an intermediate technology between ASIC and FPGA offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. The objective is to open new opportunity in Programmable Logic Device market based on Structured ASIC.

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We have done some work on floating-point benchmark generation and delay path modeling of FPGAs.

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